Research

(Section under work, outdated!)

I’m interested in hardware architectures, in particular specialized accelerators.

I’m also interested and the new modern ways of designing hardware architectures. The new generation of Electronic Design Automation tools (including high-level synthesis and other abstract tools) brings new methodologies to hardware designers, but also new opportunities to the hardware/software design world.

Most importantly, it comes with a new research era: how to efficiently use low-level hardware components (LUTs, registers, or even logic gates) from higher-level descriptions than the traditional RTL abstraction. Indeed, hardware designs can be derived from high-level hardware descriptions, algorithms, set of constraints, programs written in various programming languages (imperative, functional, domain-specific), etc. and I’m convinced that starting from a more abstract source helps deriving good hardware, from specialized operators to high-level architectural decisions.

I also show interest in functional programming and reproducibility.

 Students

PhD students

MSc students, interns

 Selected publications

Weppe, O., Chossat, J., Marty, T., Prévotet, J.-C. et Pelcat, M. (2024). Streamlined Models of CMOS Image Sensors Carbon Impacts (p. 250‑257). https://doi.org/10.1109/DSD64264.2024.00041
Vacher, Q., Beuve, N., Allaire, P., Marty, T., Dardaillon, M. et Desnos, K. (2024). Hybrid Genetic Programming and Deep Reinforcement Learning for Low-Complexity Robot Arm Trajectory Planning. F. Marcelloni, K. Madani, N. van Stein et J. Filipe (dir.), (p. 139‑150). https://doi.org/10.5220/0013012500003837
Marty, T. (2022). Spéculation temporelle pour accélérateurs matériels. (Timing speculation for hardware accelerators) [thèse de doctorat, University of Rennes 1, France]. https://tel.archives-ouvertes.fr/tel-03927199
Derrien, S., Marty, T., Rokicki, S. et Yuki, T. (2020). Toward Speculative Loop Pipelining for High-Level Synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39(11), 4229‑4239. https://doi.org/10.1109/TCAD.2020.3012866
Marty, T., Yuki, T. et Derrien, S. (2020). Safe Overclocking for CNN Accelerators Through Algorithm-Level Error Detection. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 39(12), 4777‑4790. https://doi.org/10.1109/TCAD.2020.2981056
Marty, T., Yuki, T. et Derrien, S. (2018). Enabling Overclocking Through Algorithm-Level Error Detection (p. 174‑181). https://doi.org/10.1109/FPT.2018.00034
Kritikakou, A., Marty, T. et Roy, M. (2017). DYNASCORE: DYNAmic Software COntroller to Increase REsource Utilization in Mixed-Critical Systems. ACM Trans. Design Autom. Electr. Syst., 23(2), 13:1‑13:26. https://doi.org/10.1145/3110222

 Activities

I helped reviewing papers submitted to the following conferences:

I participated (presentation and/or poster) in the followings scientific meetings: